The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a built-in internal supply voltage step-down circuit for generating an internal supply voltage.
In recent years, semiconductor integrated circuits, especially semiconductor memory devices have increased the densities of integration owing to the progress of various relevant technologies. Up-to-date microfabrication techniques have been adopted for the semiconductor memory devices, the memory capacities of which have been quadrupled in three years. In this regard, in the semiconductor memory device such as 4-megabit static RAM (4MSRAM) or 16-megabit dynamic RAM (16MDRAM), the deteriorations of transistor performances attributed to hot electrons and degradation in a gate oxide film have become a serious problem with the microminiaturization of transistors. In order to prevent the deteriorations of the transistors, therefore, researches have been made on the use of the internal supply voltage of the semiconductor memory device that is stepped down from the external supply voltage thereof, and studies have been made on the mounting of an internal supply voltage step-down circuit in the semiconductor memory device.
The prior-art semiconductor memory device having such an internal supply-voltage step-down circuit is shown in FIG. 1. Referring to FIG. 1, the memory device is composed of a memory cell array 4 and as peripheral circuits, an address buffer 3-1, a row decoder 3-2, a column decoder 3-3 and an input/output circuit 3-4 in a known manner. The memory device further comprises a supply-voltage step-down circuit 1 which receives an external power voltage Vcc which is usual set at 5 V and generates a reduced value of an internal supply voltage V.sub.INT, a value of which is typically 3 to 4 V. The internal voltage V.sub.INT is fed to an internal power supply wiring 5 coupled to the peripheral circuits 3-1 to 3-4 and the memory cell array 4. By stepping down the external supply voltage to the internal supply voltage of the semiconductor memory device in this manner, the deteriorations of the characteristics of the transistors can be prevented to realize a semiconductor device of high reliability.
Meanwhile, in general, when a semiconductor manufacturer has produced semiconductor devices, it sorts out the defective semiconductor devices in order to remove them before shipment. Further, it often performs a burn-in test (BT) in order to remove initial conductor device is exposed to high temperature (on the order of +120.degree. C.) and high voltage (on the order of +7 V) for a long time (several to several tens hours), thereby to remove initial defective units.
Since, however, the prior-art semiconductor memory device drops the external supply voltage therein and then uses the dropped voltage in order to ensure the reliabilities of the, transistors, the high voltage is lowered within the device even during the burn-in test described above, resulting in the problem that initial defective units cannot be effectively removed. In other words, it is almost impossible to directly apply the external supply voltage raised to the high voltage e.g. 7 V to the internal elements such as transistors during the burn-in test because there is inevitably the internal supply-voltage step-down circuit present between the external supply voltage terminal and the internal elements, and the internal supply-voltage step-down circuit produces the regulated or reduced value of the internal supply voltage to the internal elements.